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[root@astaroth bin]# ./crt_emu_cm3_nxp -info-emu -wire=winusb
Ni: LPCXpresso Debug Driver v4.0 (Mar 25 2012 14:25:27)
1 Emulators available:
0. LPCLINK_1_1	LPC-Link Driver LINUX32 v1.1 (Code Red - LPCXpresso)

[root@astaroth bin]# ./crt_emu_cm3_nxp -info-target -pLPC1768 -wire=winusb -4
Ni: LPCXpresso Debug Driver v4.0 (Mar 25 2012 14:25:27)
Nc: Looked for chip XML file in /usr/local/lpcxpresso_4.2.2_238/lpcxpresso/bin/LPC1768.xml

Nc: Looked for vendor directory XML file in /usr/local/lpcxpresso_4.2.2_238/lpcxpresso/bin/nxp_directory.xml

Nc: Found generic directory XML file in /usr/local/lpcxpresso_4.2.2_238/lpcxpresso/bin/crt_directory.xml

Nc: Emu(0): Conn&Reset. DpID: 2BA01477. Info: LPCLINK_1_1
Nc: SWD Frequency: 3000 KHz. RTCK: False. Vector catch: False.
Nc: Packet delay: 0  Poll delay: 0.
Nc: NXP: LPC1768  Part ID: 0x26013F37
Chip=LPC1768, from NXP (formerly Philips), in family LPC17xx, version=unknown
Chip Description: NXP LPC1768
ClockFreq=100.0MHz (Accurate). Clock can be changed after reset.
System reset doesn't cause power cycle. Last reset cause(s): PowerOn, External
Does have Flash and is programmable. 128M pop Mask: 0001
Mem MFlash512 of type Flash from 0000 for 524288 bytes. RO 
Mem RamLoc32 of type RAM from 10000000 for 32768 bytes. 
Mem RamAHB32 of type RAM from 2007c000 for 32768 bytes. 
PrgFlash from 0000 to 80000 (524288 bytes). 2 Variable sized page rules (16 4K,14 32K)
  'Word' width: 4. Cannot read after programming starts
Peripheral TIMER3 at 0x40094000, size=64. Is part of Chip
  Timer
  Enabled by SYSCTL.PCONP.PCTIM3&0x1
Peripheral TIMER2 at 0x40090000, size=64. Is part of Chip
  Timer
  Enabled by SYSCTL.PCONP.PCTIM2&0x1
Peripheral TIMER1 at 0x40008000, size=64. Is part of Chip
  Timer
  Enabled by SYSCTL.PCONP.PCTIM1&0x1
Peripheral TIMER0 at 0x40004000, size=64. Is part of Chip
  Timer
  Enabled by SYSCTL.PCONP.PCTIM0&0x1
Peripheral SPI at 0x40020000, size=31. Is part of Chip
  SPI Interface
  Enabled by SYSCTL.PCONP.PCSPI&0x1
Peripheral MPU at 0xE000ED90, size=188. Is part of Chip
  MPU
Peripheral GPIO4 at 0x2009C080, size=32. Is part of Chip
  General Purpose IO
  Enabled by SYSCTL.PCONP.PCGPIO&0x1
Peripheral GPIO3 at 0x2009C060, size=32. Is part of Chip
  General Purpose IO
  Enabled by SYSCTL.PCONP.PCGPIO&0x1
Peripheral GPIO2 at 0x2009C040, size=32. Is part of Chip
  General Purpose IO
  Enabled by SYSCTL.PCONP.PCGPIO&0x1
Peripheral GPIO1 at 0x2009C020, size=32. Is part of Chip
  General Purpose IO
  Enabled by SYSCTL.PCONP.PCGPIO&0x1
Peripheral GPIO0 at 0x2009C000, size=32. Is part of Chip
  General Purpose IO
  Enabled by SYSCTL.PCONP.PCGPIO&0x1
Peripheral I2S at 0x400A8000, size=53. Is part of Chip
  I2S
  Enabled by SYSCTL.PCONP&0x08000000
Peripheral PCB at 0x4002C000, size=124. Is part of Chip
  Pin Control Block
Peripheral SYSCTL at 0x400FC000, size=460. Is part of Chip
  System control block
Peripheral DAC at 0x4008C000, size=11. Is part of Chip
  DAC
  Enabled by PCB.PINSEL1.P0_26&0x2=2
Peripheral SSP1 at 0x40030000, size=40. Is part of Chip
  SSP Interface
  Enabled by SYSCTL.PCONP.PCSSP1&0x1
Peripheral SSP0 at 0x40088000, size=40. Is part of Chip
  SSP Interface
  Enabled by SYSCTL.PCONP.PCSSP0&0x1
Peripheral CANAFR at 0x4003C000, size=32. Is part of Chip
  CAN Acceptance Filter Registers
  Enabled by SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1
Peripheral CANCEN at 0x40040000, size=12. Is part of Chip
  Central CAN Registers
  Enabled by SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1
Peripheral CANCON2 at 0x40048000, size=96. Is part of Chip
  CAN Controller Registers
  Enabled by SYSCTL.PCONP.PCCAN2&0x1
Peripheral CANCON1 at 0x40044000, size=96. Is part of Chip
  CAN Controller Registers
  Enabled by SYSCTL.PCONP.PCCAN1&0x1
Peripheral CANWAKESLEEP at 0x400FC110, size=8. Is part of Chip
  CAN Wake and Sleep Registers
Peripheral ADC at 0x40034000, size=56. Is part of Chip
  Analog to Digital Converter
  Enabled by SYSCTL.PCONP.PCAD&0x1
Peripheral USBDEV at 0x5000C200, size=4092. Is part of Chip
  USB Device Controller  (You need to set PCONP.PCUSB and the USBCLKCTL bits to access this)
  Enabled by USBCLKCTL.USBClkSt&0x12=0x12
Peripheral PWM at 0x40018000, size=116. Is part of Chip
  PWM
  Enabled by SYSCTL.PCONP.PWM1&0x1
Peripheral I2C2 at 0x400A0000, size=64. Is part of Chip
  I2C Interface
  Enabled by SYSCTL.PCONP.PCI2C2&0x1
Peripheral I2C1 at 0x4005C000, size=64. Is part of Chip
  I2C Interface
  Enabled by SYSCTL.PCONP.PCI2C1&0x1
Peripheral I2C0 at 0x4001C000, size=64. Is part of Chip
  I2C Interface
  Enabled by SYSCTL.PCONP.PCI2C0&0x1
Peripheral DMA at 0x50004000, size=500. Is part of Chip
  DMA Controller
  Enabled by SYSCTL.PCONP.PCGPDMA&0x1
Peripheral ENET at 0x50000000, size=4088. Is part of Chip
  Ethernet MAC
  Enabled by SYSCTL.PCONP.PCENET&0x1
Peripheral DCR at 0xE000EDF0, size=16. Is part of Chip
  M3 Debug Core Registers
Peripheral QEI at 0x400BC000, size=4080. Is part of Chip
  Quadrature Encoder Interface
  Enabled by SYSCTL.PCONP.PCQEI&0x1
Peripheral USBHOST at 0x5000C000, size=4092. Is part of Chip
  USB Host Controller  (You need to set PCONP.PCUSB and the USBCLKCTL bits to access this)
  Enabled by USBCLKCTL.USBClkSt&0x11=0x11
Peripheral USBOTG at 0x5000C000, size=4092. Is part of Chip
  USB OTG Controller (You need to set PCONP.PCUSB and the USBCLKCTL bits to access this)
  Enabled by USBCLKCTL.USBClkSt&0x1c=0x1c
Peripheral NVIC at 0xE000E000, size=3844. Is part of Chip
  NVIC M3 Control/Status Regsiters
Peripheral RTC at 0x40024000, size=134. Is part of Chip
  Real time clock
  Enabled by SYSCTL.PCONP.PCRTC&0x1
Peripheral WDT at 0x40000000, size=20. Is part of Chip
  Watchdog Timer
Peripheral UART1 at 0x40010000, size=85. Is part of Chip
  UART
  Enabled by SYSCTL.PCONP.PCUART1&0x1
Peripheral UART3 at 0x4009C000, size=88. Is part of Chip
  UART
  Enabled by SYSCTL.PCONP.PCUART3&0x1
Peripheral UART2 at 0x40098000, size=88. Is part of Chip
  UART
  Enabled by SYSCTL.PCONP.PCUART2&0x1
Peripheral UART0 at 0x4000C000, size=88. Is part of Chip
  UART
  Enabled by SYSCTL.PCONP.PCUART0&0x1
Peripheral USBCLKCTL at 0x5000CFF4, size=8. Is part of Chip
  USB Clock Control (you need to have set PCONP.PCUSB to write these registers)
Peripheral USBINTSTAT at 0x400FC1C0, size=4. Is part of Chip
  USB Interrupt Status  (You need to set PCONP.PCUSB and the USBCLKCTL bits to access this)
  Enabled by USBCLKCTL.USBClkCtrl&0x12
Peripheral FLASHACCEL at 0x400FC000, size=4. Is part of Chip
  Flash Accelerator Configuration register
Peripheral GPIOINTMAP at 0x40028080, size=56. Is part of Chip
  GPIO Interrupt Register Map
Peripheral MCPWM at 0x400B8000, size=120. Is part of Chip
  Motor Control Pulse Width Modulator
  Enabled by SYSCTL.PCONP.PCMCPWM&0x1
Peripheral RIT at 0x400B0000, size=16. Is part of Chip
  Repetitive Interrupt Timer
  Enabled by SYSCTL.PCONP.PCRIT&0x1
 <link href="file:////usr/local/lpcxpresso_4.2.2_238/lpcxpresso/bin/nxp_lpcxxxx_peripheral.xme" type="simple" show="embed" />
CPUID=0x410FC230, Little-Endian. Name=CM3, Chip=LPC1768,
CpuNum=3, Rev=0.0, MaxInts=64, SysTickCal=F423F
State is: Stopped (stop cause: Step)
Emulator support: 'Code Red WinUSB emulator support for Cortex-M3', version: 2.0
Connected to emu0: 'LPCLINK_1_1'
Connection state: ConnAndReset. DP ID=2BA01477. Sticky=10
Speed=1. Frequency=3000KHz. Packet delay=0, Poll delay=0. Info from speed test.
Retries=0. Since last Info request: 0
AP is_sel=SEL. AP rel idx=0 for ID=24770011
ROM table @E00FF003. Debug is OK. Bank=0, CtrlBase=23000000
0 devices:


[root@astaroth bin]#